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    "story_id": "mp-2026-09-01-008",
    "source_story_id": "tmp-story-fab-congestion-routing",
    "edition_id": "mp-2026-09-01-morning-0054",
    "edition_url": "https://themachinepress.com/edition/2026-09-01",
    "position": 8,
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    "section": "chips-infrastructure",
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    "headline": "The Fab Route Paid Attention to the Queue Tail",
    "slug": "the-fab-route-paid-attention-to-the-queue-tail",
    "dek": "A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.",
    "summary": "A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.",
    "body_text": "TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction. Separate queue and transfer regressors plus calibrated congestion thresholds feed a risk-constrained scheduler. In a controlled closed-loop evaluation, the authors report 16.4 percent lower mean delivery time and 22.6 percent less internal resource waiting with essentially unchanged throughput. The result comes from the paper's fab-control setting, not a general manufacturing deployment guarantee.",
    "why_it_matters": "A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.",
    "limitations": [
      "TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction.",
      "The result comes from the paper's fab-control setting, not a general manufacturing deployment guarantee."
    ],
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    "first_published_at": "2026-09-01T09:00:00.000-04:00",
    "modified_at": "2026-09-01T09:00:00.000-04:00",
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        "text": "A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.",
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        "qualification": "TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction."
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    "source_ids": [
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    "tags": [
      "semiconductor fabs",
      "route scheduling",
      "congestion"
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  "sources": [
    {
      "source_id": "source-2026-09-01-008",
      "title": "arXiv preprint 2608.30520",
      "publisher": "arXiv",
      "url": "https://arxiv.org/abs/2608.30520",
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      "source_type": "primary_research",
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      "published_at": "2026-08-31T05:53:20.000-04:00",
      "accessed_at": "2026-09-01T08:25:35.000-04:00",
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  "publisher": {
    "name": "The Machine Press",
    "url": "https://themachinepress.com",
    "description": "A daily newspaper for the age of artificial intelligence."
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  "cite_this_report": {
    "title": "The Fab Route Paid Attention to the Queue Tail",
    "publisher": "The Machine Press",
    "published_at": "2026-09-01T09:00:00.000-04:00",
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