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    "story_id": "mp-2026-09-03-008",
    "source_story_id": "tmp-story-leech-lattice-two-bit-serving",
    "edition_id": "mp-2026-09-03-morning-0056",
    "edition_url": "https://themachinepress.com/edition/2026-09-03",
    "position": 8,
    "story_type": "dispatch",
    "section": "infrastructure",
    "editorial_classification": "editorial",
    "headline": "Two-Bit Weights Met the Cost of Their Decoder",
    "slug": "two-bit-weights-met-the-cost-of-their-decoder",
    "dek": "A full multi-shell Leech-lattice decoder exposes the gap between compact on-disk weights and the bytes a serving kernel actually reads.",
    "summary": "A full multi-shell Leech-lattice decoder exposes the gap between compact on-disk weights and the bytes a serving kernel actually reads.",
    "body_text": "The implementation expands a 301-class codebook into GPU layouts and fuses dequantization with matrix-vector multiplication for batch-one decoding. Binary bit planes beat one-hot masks, but the served layout still read 2.40× more bytes and ran 2.27× slower than the compared trellis kernel. With a shared output head, end-to-end gains rose from 1.11× at 4B to 1.41× at 14B, while the 4B quality cost remained substantial, underscoring that nominal bit rate is not the whole serving story.",
    "why_it_matters": "A full multi-shell Leech-lattice decoder exposes the gap between compact on-disk weights and the bytes a serving kernel actually reads.",
    "limitations": [
      "With a shared output head, end-to-end gains rose from 1.11× at 4B to 1.41× at 14B, while the 4B quality cost remained substantial, underscoring that nominal bit rate is not the whole serving story."
    ],
    "importance": 7,
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    "first_published_at": "2026-09-03T09:00:00.000-04:00",
    "modified_at": "2026-09-03T14:20:28.218-04:00",
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        "text": "A full multi-shell Leech-lattice decoder exposes the gap between compact on-disk weights and the bytes a serving kernel actually reads.",
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        "qualification": "With a shared output head, end-to-end gains rose from 1.11× at 4B to 1.41× at 14B, while the 4B quality cost remained substantial, underscoring that nominal bit rate is not the whole serving story."
      }
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    "source_ids": [
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    "tags": [
      "2-bit weights",
      "GPU kernels",
      "LLM serving"
    ],
    "image_url": null,
    "corrections": []
  },
  "sources": [
    {
      "source_id": "source-2026-09-03-008",
      "title": "arXiv preprint 2609.02652",
      "publisher": "arXiv",
      "url": "https://arxiv.org/abs/2609.02652",
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      "source_type": "primary_research",
      "is_primary_source": true,
      "published_at": "2026-09-02T10:26:06.000-04:00",
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  "publisher": {
    "name": "The Machine Press",
    "url": "https://themachinepress.com",
    "description": "A daily newspaper for the age of artificial intelligence."
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  "cite_this_report": {
    "title": "Two-Bit Weights Met the Cost of Their Decoder",
    "publisher": "The Machine Press",
    "published_at": "2026-09-03T09:00:00.000-04:00",
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