chips infrastructure
The Circuit Learned to Route Around a Broken Gate
A topology-masked Transformer rebuilt Boolean logic after permanent faults it had not seen during training.

Summary
A topology-masked Transformer rebuilt Boolean logic after permanent faults it had not seen during training.
A preprint recasts fault-tolerant digital logic as graph-based meta-learning. Its topology-masked Transformer sets lookup tables across a circuit, assembling a target Boolean function and re-routing around damaged gates rather than restoring one fixed layout. The authors report more than 99.99 percent accuracy after soft errors larger than the training distribution and improving generalization on wider graphs. These are simulated circuits and reported benchmark results; the study does not establish performance on fabricated hardware, timing closure, power limits or industrial workloads.
Why it matters
A topology-masked Transformer rebuilt Boolean logic after permanent faults it had not seen during training.
Limits and context
- These are simulated circuits and reported benchmark results; the study does not establish performance on fabricated hardware, timing closure, power limits or industrial workloads.
Key claims
A topology-masked Transformer rebuilt Boolean logic after permanent faults it had not seen during training.
Qualification: These are simulated circuits and reported benchmark results; the study does not establish performance on fabricated hardware, timing closure, power limits or industrial workloads.
Evidence: source-2026-08-05-008
Sources
- arXiv preprint 2608.02606arXiv · primary research
Corrections
No corrections have been recorded for this story.