chips infrastructure
The Fab Route Paid Attention to the Queue Tail
A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.
Summary
A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.
TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction. Separate queue and transfer regressors plus calibrated congestion thresholds feed a risk-constrained scheduler. In a controlled closed-loop evaluation, the authors report 16.4 percent lower mean delivery time and 22.6 percent less internal resource waiting with essentially unchanged throughput. The result comes from the paper's fab-control setting, not a general manufacturing deployment guarantee.
Why it matters
A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.
Limits and context
- TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction.
- The result comes from the paper's fab-control setting, not a general manufacturing deployment guarantee.
Key claims
A semiconductor material-control system predicts delivery time and extreme congestion before choosing each relay route.
Qualification: TN-DCR combines a static transport graph with recent network congestion, route bottlenecks and graph-aware embeddings, while admitting only information available before each prediction.
Evidence: source-2026-09-01-008
Sources
- arXiv preprint 2608.30520arXiv · primary research
Corrections
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