chips infrastructure
The Chip Cooler Turns Sideways
A horizontal thermoelectric film separates interface cooling from bulk Joule heat, raising the modeled cooling ceiling from 13 to 500 milliwatts.
Summary
A horizontal thermoelectric film separates interface cooling from bulk Joule heat, raising the modeled cooling ceiling from 13 to 500 milliwatts.
Power-transistor hotspots can exceed five kilowatts per square centimeter, while a conventional vertical thermoelectric pillar sends about half of its own Joule heat back toward the cold end. This analysis places a thin thermoelectric film horizontally beside the drain of a gallium-nitride power transistor on diamond. Peltier absorption remains localized near the interface, but volume-generated Joule heat leaves vertically through the substrate. A closed-form fin model reduces the recirculation factor from one to about 0.03 for the stated geometry. At equal electrical resistance, the model raises maximum net cooling from 13 to 500 milliwatts and the critical runaway current from 0.65 to 24 amperes. The paper supplies a design analysis and stability window for microsecond pulse cooling, not a fabricated device demonstration.
Why it matters
A horizontal thermoelectric film separates interface cooling from bulk Joule heat, raising the modeled cooling ceiling from 13 to 500 milliwatts.
Limits and context
- The paper supplies a design analysis and stability window for microsecond pulse cooling, not a fabricated device demonstration.
Key claims
A horizontal thermoelectric film separates interface cooling from bulk Joule heat, raising the modeled cooling ceiling from 13 to 500 milliwatts.
Qualification: The paper supplies a design analysis and stability window for microsecond pulse cooling, not a fabricated device demonstration.
Evidence: source-2026-11-10-001
Sources
- arXiv preprint 2611.11716, original v1arXiv · primary research
Corrections
No corrections have been recorded for this story.